Test produktionsbedingter Laufzeitfehler in hochintegrierten, digitalen Schaltungen
|Other Titles:||Production test of delay faults in digital VLSI circuits||Authors:||Meyer, Volker H.-W.||Supervisor:||Anheier, Walter Drechsler, Rolf||1. Expert:||Thiele, Georg||2. Expert:||Lohmann, Boris||Abstract:||
The increasing clock frequencies have led to new fault effects of production defects. These so called "delay faults" have to be adressed by todays production test. The research work which was supported by Philips Semiconductors, Hamburg, provides an introduction into the problems of delay fault testing in a production environment. A test pattern generator for path delay faults has been developed. Furthermore, different classes of test quality have been defined. The investigations focus on the properties of this classes of test quality. At the end of the thesis, the next fault effects, so called signal integrity faults, are introduced which will occur as the operating clocks continue to increase. Based on their relationship with delay faults it is discussed how a test pattern generator for such faults could be constructed.
|Keywords:||Verzögerungsfehler, Produktionstest, Testmustergenerierung, Fehlersimulation||Issue Date:||17-Dec-2003||URN:||urn:nbn:de:gbv:46-diss000009177||Institution:||Universität Bremen||Faculty:||FB1 Physik/Elektrotechnik|
|Appears in Collections:||Dissertationen|
checked on Sep 24, 2020
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