Leistungsbauelemente in der Automobilindustrie: Erhöhung der Robustheit von Schutz- und Nutzstrukturen bei verringerten Flächen
File | Description | Size | Format | |
---|---|---|---|---|
00101821-1.pdf | 16.06 MB | Adobe PDF | View/Open |
Other Titles: | Power Devices for Automotive Industrie: Increase of Robustness of Protection Structures and Usage Structures at Reduced Areas | Authors: | Joos, Joachim | Supervisor: | Silber, Dieter | 1. Expert: | Silber, Dieter | Experts: | Laur, Rainer | Abstract: | The target of this thesis is to provide an insight of the internal sequences of semiconductor devices under extreme electrical and thermal load. In addition, the limits of typical high voltage devices of a BCDMOS technology are shown. New options to increase the robustness within device development are explained using examples and afterwards generalized. Specific protection structures need to be used additionally if these options are not sufficient to achieve the required robustness. The related problems and limits are demonstrated using examples. First, an introduction to Smart Power and its process details, an overview about field effect transistors, bipolar structures in general and especially thyristors are given. Following ESD and ISO events, dualization and characteristics of H-bridges are analysed. The basic behaviour of power transistors is discussed. The so called Dual Thyristor is developed based on the theoretical background and its applications are shown. The Dual Thyristor combines significantly increased self protective characteristics with an excellent performance as a power switch. In this work an integrated version for a BCDMOS technology for Infineon Technologies AG is introduced. The Dual Thyristor as High-Side-Switch for an Half Bridge or H-Bridge has better cost/performance-indicators compared to p-channel and n-channel switches including driver stages. Lateral High-Voltage-Devices are discussed. Complex simulations are necessary to demonstrate the destruction processes. 2D simulation gives a first insight to internal processes. Parallelization of 2D-structures at the same or different sizes allows further qualitative improved statements about trigger behaviour of the parasitic bipolar transistor. However, the 3D thermodynamic simulation with extended simulation time of several weeks is needed to get quantitative valid statements regarding the device behaviour. Construction rules for a robust design are derived. For example, smooth doping profile from drift region to drain contact. Appropriate doping profile of the body towards the drift region enables dynamic base push out. A new construction of the drift region allows accumulation of carriers for the on state and further improved extraction of carriers in the off state combined with reduced length of drift region. All this measures can be realized at the same cost or with improved cost/performance ratio. Protection structures are used if a device is not able to fulfil the strong robustness requirements especially in the field of automotive applications. The internal workflows under extreme overload conditions, as trigger behaviour of bipolar and thyristor structures and the hence resulting problems are demonstrated using examples. Simulations demonstrate moving and jumping filaments. This can only be shown within 3D electrothermal simulations causing huge simulation effort. Thereof, a new possibility to adjust holding voltage for highly efficient bipolar structures is developed. The dynamically changing emitter efficiency when moving towards high injection is used. Finally, recommendations for circuit development, the state of technology as well as future trends are defined. The results of this thesis enable to increase the robustness of lateral high voltage and power devices. Thus, Infineon Technologies AG could reduce the device area up to a factor of three using the new technology. At the same time the specifications of the old technology are fulfilled. In the past, similar robustness could only be achieved by using vertical structures with significantly worse DC characteristics (e.g., RON, ISAT , VBD). The area increases by a factor of 1.7 to 2.4 using the vertical structures. In this thesis was demonstrated that new area optimized applications at reduced costs and the fulfilment of the same requirements are possible. |
Keywords: | BCDMOS; SPT; Robustness; ESD; ISO; Power Devices; Dual Thyristor; HVPMOS; HVMOS; LDMOS | Issue Date: | 29-Nov-2010 | Type: | Dissertation | Secondary publication: | no | URN: | urn:nbn:de:gbv:46-00101821-11 | Institution: | Universität Bremen | Faculty: | Fachbereich 01: Physik/Elektrotechnik (FB 01) |
Appears in Collections: | Dissertationen |
Page view(s)
272
checked on Apr 2, 2025
Download(s)
254
checked on Apr 2, 2025
Google ScholarTM
Check
Items in Media are protected by copyright, with all rights reserved, unless otherwise indicated.