Logic Synthesis Techniques for Optical Circuits
|Other Titles:||Logiksynthesetechniken für optische Schaltungen||Authors:||Deb, Arighna||Supervisor:||Drechsler, Rolf||1. Expert:||Drechsler, Rolf||2. Expert:||Wille, Robert||Abstract:||
In the past few decades, the semiconductor industry has witnessed rapid progress in semiconductor technology. Devices became smaller and faster thanks to the continuous shrinking of transistor's size. However, with continuous downscaling, the size of the transistor is approaching its physical limits beyond which further scaling will prevent the use of traditional transistor-based technology. As a result, non-transistor computation paradigms are being investigated as alternatives to the traditional technology. Advances in silicon photonics made optical circuits a promising alternative to the traditional technology and unlocked several promising applications for the future. In this thesis, we investigate automatic logic synthesis approaches for optical circuits realizing any given Boolean function. To this end, we propose a variety of synthesis approaches based on different Boolean function representations, in which, optical circuits are synthesized with respect to the technology-specific cost metrics such as the number of gates and the effect of so-called splitter (an optical element which divides a single optical signal into many signals). More precisely, we first propose synthesis approaches based on two-level function descriptions such as Sum-of-Products (SoPs) and Exclusive-Sum-of-Products (ESoPs). Here, optical circuits are synthesized with respect to gate-efficiency (i.e. minimal number of gates) and with respect to splitter freeness. The synthesis guided with respect to gate efficiency and the synthesis guided with respect to splitter freeness reveal that reducing the number of gates and reducing the number of splitters are contradictory optimization objectives. Experimental results also confirm this fact. Next, we consider synthesis of optical circuits based on Binary Decision Diagram (BDD), an efficient data-structure for the representation of large Boolean functions. Although BDDs allow direct mapping of the function representation to an optical circuit (and, hence, a scalable circuit synthesis), they have their shortcomings with respect to the dedicated cost metrics. As a result, we investigate this issue and provide an overview of the BDD-based synthesis schemes which are available thus far. Afterwards, we propose new solutions based on dedicated BDD optimization schemes which aim for addressing the known shortcomings. Experimental results confirm the benefits of the proposed approach. We then propose a synthesis solution based on the AND-Inverter Graphs (AIGs). Herein, mainly two schemes are presented: one approach generates optical circuits with smaller number of gates, thereby yielding significantly smaller circuit sizes and the other one generates optical circuits of smaller splitting effects. Experimental evaluations confirm the benefits of the respective solutions. Lastly, we propose a novel methodology to synthesize optical circuits. To this end, we introduce and exploit OR-Inverter graphs (OIGs) - a data-structure which is particularly suited for the design of optical circuits. Experimental results confirm the efficacy of the OIG structure and the resulting synthesis approach. All the proposed synthesis approaches are compared with each other in terms of the number of gates and the effect of spliiting. Comparisons show that the synthesis scheme relying on AIGs can be a suitable choice when the number of gates is a primary design metric, whereas, synthesis scheme relying on OIGs can be a promising choice when the minimal effect of splitting is desired. Since logic synthesis is the first step towards design automation for optical circuits, therefore, the works presented in this thesis would help the future developments of the corresponding circuit technologies.
|Keywords:||Emerging Technology, Logic Synthesis, Optical Circuits.||Issue Date:||17-Dec-2018||URN:||urn:nbn:de:gbv:46-00106955-18||Institution:||Universität Bremen||Faculty:||FB3 Mathematik/Informatik|
|Appears in Collections:||Dissertationen|
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