Paul, SteffenHellwege, NicoNicoHellwege2020-03-092020-03-092015-12-11https://media.suub.uni-bremen.de/handle/elib/986The focus of this thesis is on the development and implementation of aging-aware design methods, which are suitable to satisfy current needs of analog circuit design. Based on the well known $\gm/\ID$ sizing methodology, an innovative tool-assisted aging-aware design approach is proposed, which is able to estimate shifts in circuit characteristics using mostly hand calculation schemes. The developed concept of an operating point-dependent degradation leads to the definition of an aging-aware sensitivity, which is compared to currently available degradation simulation flows and proves to be efficient in the estimation of circuit degradation. Using the aging-aware sensitivity, several analog circuits are investigated and optimized towards higher reliability. Finally, results are presented for numerous target specifications.enBitte wählen Sie eine Lizenz aus: (Unsere Empfehlung: CC-BY)CMOSReliabilityTransistorAnalogAging-AwareOperating PointTransconductance Efficiency620Dissertationurn:nbn:de:gbv:46-00104965-10