SystemC Through the Looking Glass : Non-Intrusive Analysis of Electronic System Level Designs in SystemC
Date Issued
2017-02-07
Author(s)
Supervisors
Referees
Abstract
Due to the ever increasing complexity of hardware and hardware/software co-designs, developers strive for higher levels of abstractions in the early stages of the design flow. To address these demands, design at the Electronic System Level (ESL) has been introduced. SystemC currently is the "de-facto standard" for ESL design. The extraction of data from system designs written in SystemC is thereby crucial e.g. for the proper understanding of a given system. However, no satisfactory support of reflection/introspection of SystemC has been provided yet. Previously proposed methods for this purpose %introduced to achieve the goal nonetheless either focus on static aspects only, restrict the language means of SystemC, or rely on modifications of the compiler and/or parser. In this thesis, approaches that overcome these limitations are introduced, allowing the extraction of information from a given SystemC design without changing the SystemC library or the compiler. The proposed approaches retrieve both, static and dynamic (i.e. run-time) information.
Subjects
ESL
;
SystemC
;
Analyse
;
VHDL
;
Verilog
;
Design
Institution
Type
Dissertation
Secondary publication
No
Language
English
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00105775-1.pdf
Size
4.96 MB
Format
Adobe PDF
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